LiquidMXS™

LiquidMXS

LiquidMXS is a rich collection of metal programmable Mixed Signal (MXS) IP Blocks required to implement high level SoC subsystems and clocking networks. All LiquidMXS solutions utilize a single 218u x 270u MXS base cell preconfigured up to the contact layer. All 15 flavors of PLLs, 4 types of DLLs, voltage regulation and decoupling capacitors are realized with the single MXS base cell.

LiquidMXS incorporates the Rapid Bridge Central Calibration Unit (CCU) and Central Bias Generation Unit (CBG) creating an ultra quiet and stable voltage and current environment which yields optimum Speed, Power and Area.

LiquidMXS is an integral part of the Rapid Bridge LiquidASIC and LiquidSoC IC platform solutions.

SoC integration challenges associated with mixing individually obtained MXS IPs introduces significant risk to both performance and schedule. LiquidMXS integrated system solutions alleviate a significant portion of inherited risks with traditional composition of high level systems.

LiquidMXS produces a predictable and configurable MXS solution that when incorporated with Rapid Bridge LiquidIO solutions, produces silicon efficient products that benefit from resource sharing.

One Size Fits All

LiquidMXS technology enables SoC designers to select from a wide variety of highly optimized metal programmable MXS components to fit their application needs. LiquidMXS further allows product derivatives, bug fixes and/or last minute feature adjustments to be achieved only in metal layers, resulting in accelerated Time to Market with reduced implementation risks and tooling costs.

Features

  • Central Calibration and Bias Unit
  • Common Base
  • Wide range of PLL/DLL functionality and other analog functions
  • Metal programmable dynamic range with optimum loop dynamics
  • Enable bypass Power Down

Benefits

  • Predictable performance over PVT, low power and silicon area efficient
  • Performance predictability and elimination of integration risk
  • Ease of higher level subsystem realization
  • Optimum performance for different frequency and data rates

Waveforms

Product Briefs

Function Type Range Product Brief Data Sheet
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PLL Multiplier (A,B,C,D,E)
Provides 4 output CLKs at 1/8,
1/4, 1/2 & 1 of VCO frequency
A: 100-500 MHz
B: 200-800 MHz
C: 0.4-1 GHz
D: 0.8-1.4 GHz
E: 1.2-1.8 Ghz
Acrobat Download Request Info
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PLL Interface (A,B,C,D,E)
Provides 8 output phase CLKs
in 45° steps
A: 100-500 MHz
B: 200-800 MHz
C: 0.4-1 GHz
D: 0.8-1.4 GHz
E: 1.2-1.8 Ghz
Acrobat Download Request Info
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PLL Interpolator (A,B,C,D,E)
Provides 32° output phases,
360°/32 = 11.25°
A: 100-500 MHz
B: 200-800 MHz
C: 0.4-1 GHz
D: 0.8-1.4 GHz
E: 1.2-1.8 Ghz
Acrobat Download Request Info
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DLL Master A: 295-720 Mbps
B: 380-850 Mbps
C: 780-1000 Mbps
D: 840-1400 Mbps
Acrobat Download Request Info
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Voltage Regulator Master & Slave 8mA per Master, 2mA per Slave Acrobat Download Request Info
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DAC Pipeline 500 MHz VDAC Acrobat Download Request Info
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Decoupling Cap Thick Gate 100pF Acrobat Download Request Info