LiquidMemory™

LiquidMemory

LiquidMemory is a multi port Register File compiler targeted for memory instances up to 8K bits. As with our LiquidCell offering, LiquidMemory Register Files are copper overlays that can be placed anywhere within the Sea of Transistor array.

LiquidMemory register file compiler supports the following configurations:
  • 1read 1write
  • 1read 2write
  • 2read 1write
  • 2read 2write

To provide maximum flexibility, LiquidMemory provides column muxing options for balancing the speed, area and power trade-off. The maximum number of row and column muxing is limited to 64 and 8 respectively, resulting in a total of 512 addressable locations. LiquidMemory register file width is a function of column width and is derived by dividing 128 maximum bit cells in a row by the number of columns providing an 8K bit register file.

Realizing Memories larger than 8K bits

Memory requirements larger than 8K bits are realized with multiple instantiations. To create a 16K bit solution, 2 x 8K bit register files can be placed back-to-back with proper multiplexing of both Address and Data lines. Mirroring the above 16K bit solution, register file configurations up to 32K bit are achievable.

Competitive area utilization

LiquidMemory register file instances offer competitive area resources when compared to similar SRAM configurations.

Features

  • Single instances up to 8K bits
  • Multiple instance configuration support up to 32K bits
  • Row and Column mixing configuration
  • Register file solutions typically smaller than comparable SRAM solutions

Benefits

  • Operating frequency ranges from 300 - 700MHz
  • Up to 4 port: 1R/1W, 1R/2W, 2R/1W & 2R/2W
  • Model support for standard EDA tools and flows
  • Metal configurable: Instance location anywhere within Sea of Transistor array

Product Briefs

Feature Type Product Brief Data Sheet
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