LiquidIO™

LiquidIO is a flexible IO system patented by Rapid Bridge to meet the challenging environment of SoC designs. Just as SerDes utilizes a highly integrated system level approach to achieve optimum performance/area/power characteristics, LiquidIO applies similar system level approach to the external IC connections including all standardized IOs, PHYs and Mixed-Signal.

LiquidIO supports up to 40 different standard interfaces defined by IEEE, JEDEC and TIA committees. A standardized template along with metal overlays are used to configure different standards.

LiquidIO incorporates a closed loop calibration scheme that provides impedance calibration for all standards regardless of operating frequency or signaling voltage, yielding optimum power consumption and area efficiency so frequently ignored in the interface section due to lack of controllability.

LiquidIO's top down design approach provides seamless programmability and configurability of the entire IO ring with maximum flexibility for re-arrangement, power assignment and interface type change. The common IO slot base reduces ESD, latchup implementation risks significantly, eliminating unpredictability and redesigns.

LiquidIO incorporates our Sea of Transistors (refer to LiquidCell) programmable functionality into the logic section of the IO slot base to provide for composition of higher level subsystems (such as DDR). The reserved programmable logic section of the IO slot base is equivalent to 300 nand2 gates and can be used for designs that require timing accurate logic blocks, such as serialization, de-serialization, clock synchronization, etc within the IO cell.

LiquidIO is complemented with Rapid Bridge EDA productivity tools (IOCalculator and IORingComposer) to compose IO rings and JTAG insertion (IEEE 1149.6) within 2-3 days.

One Size Fits All

High level of IO & PHY integration and flexibility clearly optimizes the creation and implementation of SoCs resulting in smaller, faster and lower power solutions compared to standard ASIC or COT. Rapid Bridge's comprehensive SoC platform (refer to LiquidASIC & LiquidSoC) offers significant improvement in areas of On Chip Variation (OCV), design consistency, yield, reliability and 1st silicon success.

Product derivatives, bug fixes or last minute feature adjustments can be implemented in only metal layers resulting in accelerated Time-To-Market with lower implementation and tooling costs.